计算机断层扫描CT与X射线传感器

The AS5912 is an ultra-low noise, 512-channel low power current to digital converter that enables the readout of photodiodes of a CT detector with highest sensitivity. The output currents of 512 photodiodes are converted simultaneously into digital without any dead time resulting in no charge loss on the inputs. The AS5912 combines current-to-voltage integration and A/D conversion for 512-channels in one device. The ADC architecture with its low-noise integrators, coarse quantizer, sample-and-hold and fine quantizer guarantee lowest input related noise of maximum 0.29 fC (low noise mode) at an input current range of 0.5 µA. The input current range of the ADC is selectable between 0.5 µA and 1 µA.The AS5912 supports two supply concepts: a single analog and true ground supply, in both modes the photodiodes are zero biased for ultra-low dark current of the photodiode. In true ground mode, the AS5912 operates at ±1.5 V dual analog supply while in single supply mode only a single analog supply of +3.0 V is needed. The device detects automatically the chosen supply concept. No external components are required for supply decoupling. To reduce PCB area and simplify the assembly process, decoupling capacitors for supply and reference voltages are integrated in the 23 x 15 mm² FBGA package. The on-chip LDOs, reference voltages and a temperature sensor minimize the external component requirements and reduces the bill of material.Full-scale range, integration time and power mode are configurable over a SPI-compatible serial interface as well as the digital output modes of the LVDS interface. In low power mode, the power dissipation can be minimized down to 1.25 mW per channel for reduced self-heating of the CT detector. The adjustable integration time down to 51 µs allow very high frame rates.

The AS5951 is a sensor chip for 32-slice CT detectors that combines the photodiodes and the readout circuit on a single CMOS chip. This sensor solution, which includes an array of photodiodes with ultra-low dark current and a 128-channel ADC side-by-side, allows the assembly of the pixel array on three adjacent edges of the device. Two AS5951 ICs can be placed in Z-direction enabling the design of 32-slice detectors for cost optimized CT machines.The AS5951 has a sensor dimension in Z-direction of 15.615 mm with a pixel dimension of 0.98x0.98 mm² in high resolution mode. In low dose mode two pixels are connected together to a 0.98x1.96 mm², this mode reduces the power consumption, as only half of the ADC channels are active. Pixel dimensions can be customized on request. The sensor can be directly assembled on a substrate using a wire bonding process for manufacturing of a CT module.Improved low dose performance can be achieved because of superior dark current of max. 1pA due to the near zero offset voltage across the photodiode. The input-related noise is very low, in high-resolution mode a typ. noise of 0.21 fC can be reached for an input current range of 200 nA.The max. power dissipation of 128 mW per device in high resolution mode and 67.2 mW in low power mode reduces self-heating effects and lowers the overall cost of cooling the system. An internal reference voltage and bias generator reduces the bill of material. Featuring on-chip photodiodes, the AS5951 offers a cost-optimized solution for 32-slice CT detectors.The digital data readout can be accessed via SPI interface. It is also used to configure parameters such as mode of operation, input current range, selection of reference voltage and enabling the calibration mode. An integrated temperature sensor enables monitoring of the junction temperature. 

The AS5850B is a 16-bit, 256-channel low-noise charge-to-digital converter designed for use in digital X-ray systems. The high degree of programmability enables system performance optimization in a wide range of applications. The combination of fast speed, low noise and low power consumption maximizes the image quality and minimizes patient dose, exposure whilst improving the time to market.Each channel front-end consists of a charge sensitive amplifier (CSA) and a correlated double sampler (CDS), that removes offset and flicker noise from the signal, which is then converted to digital. A fast and reliable LVDS interface transmits the output digital data off-chip. Built-in diagnostic functionalities enable to locate the source of errors in the signal chain from the detector to the data acquisition system. Voltage references and a temperature sensor are included on the chip. An SPI interface allows easy programming of the device parameters.Four different power modes allow the user to minimize the current consumption for the chosen speed. Line times of 20, 28.5, 40 and 80 μs require as little as 3.1, 2.6, 1.6 and 1.1 mW per channel respectively. A special ADC operation mode is also available, that decreases the minimum line time to 15 μs without increasing the power consumption. Additionally, it is possible to add together the charges in pairs of adjacent channels; with this binning, the fastest achievable line time is 10 μs.